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  1 fn 8394 .3 march 1 9 , 2013 1 - 888 - intersil or 1 - 888 - 468 - 3774 | copyright intersil americas llc 2013 . all rights reserved intersil (and design) is a trademark owned by intersil corporation or one of its subsidiaries. all other trademarks mentioned are the property of their respective owners. t e c h w e l l 8 - c hannel wd1 ( 960h )/d1 compatible video decoder s and audio codecs tw296 8 features video d ecoder wd1 (960h) and d1 compatible video decoding operation and each channel is programmable ntsc (m, 4.43) and pal (b, d, g, h, i, m, n, n combination), pal (60) support with automatic format detection software selectable analog inputs allows any of 2 cvbs per one video adc built - in analog anti - alias filter four 10 - bit adcs and analog clamping circuit for cvbs input fully programmable static gain or automatic gain control for the y channel programmable white peak control for cvbs channel 4 - h adaptive comb filter y/c separation pal delay line for color phase error correction image enhancement with peaking and cti digital sub - carrier pll for accurate color decoding d igital horizontal pll for synchronization processing and pixel sampling advanced synchronization processing and sync detection for handling non - standard and weak signal programmable hue, brightness, saturation, contrast, sharpness automatic color control a nd color killer itu - r 656 like ycbcr (4:2:2) output or time multiplexed output with 36/ 72/144mhz for wd1 or 27/54/108mhz for d1 format audio codec t en integrated audio adcs processing and one audio dac p rovides multi - channel audio mixed analog output supp ort s i2s/dsp master/slave interface for record output and playback input pcm 8/16 - bit and u - law/a - law 8 - bit for audio word length programmable audio sample rate that covers popular frequencies of 8/16/32/44.1/48khz miscellaneous embedded ptz tx pulse gener ation two - wire mpu serial bus interface integrated clock pll for 144 /108 mhz clock output power save and power down mode low power consumption single 27 mhz crystal for all standards and both wd1 and d1 format 3.3 v tolerant i/o 1 . 0 v /3.3v power supply 1 28 - pi n l qfp package (pin compatible with tw2964 128 - lqfp version)
tw2 968 for additional products, see www.intersil.com/product_tree intersil products are manufactured, assembled and tested utilizing iso9000 quality systems as noted in the quality certifications found at www.intersil.com/design/quality intersil products are sold by description only. intersil corporation reserves the right to make changes in circuit design, so ftware and/or specifications at any time without notice. accordingly, the reader is cautioned to ve rify that data sheets are current before placing orders. information furnished by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of patents or o ther rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiaries. for information regarding intersil corporation and its products, see www.inter sil.com v d 3 [ 7 : 0 ] m u x i n t e r f a c e m p p c o a x i t r o n i n t e r f a c e v d 1 [ 7 : 0 ] v d 2 [ 7 : 0 ] v d 4 [ 7 : 0 ] 4 h c o m b v i d e o d e c o d e r a d c 4 h c o m b v i d e o d e c o d e r v i n 4 4 h c o m b v i d e o d e c o d e r a d c 4 h c o m b v i d e o d e c o d e r v i n 5 4 h c o m b v i d e o d e c o d e r a d c 4 h c o m b v i d e o d e c o d e r v i n 6 4 h c o m b v i d e o d e c o d e r a d c 4 h c o m b v i d e o d e c o d e r v i n 7 4 h c o m b v i d e o d e c o d e r a d c 4 h c o m b v i d e o d e c o d e r v i n 8 4 h c o m b v i d e o d e c o d e r a d c 4 h c o m b v i d e o d e c o d e r v i n 3 4 h c o m b v i d e o d e c o d e r a d c 4 h c o m b v i d e o d e c o d e r v i n 2 4 h c o m b v i d e o d e c o d e r a d c 4 h c o m b v i d e o d e c o d e r v i n 1 m p p 1 / p t z a d d 0 m p p 2 / p t z a d d 1 m p p 3 / p t z a d d 2 m p p 4 / p t z d a t c l o c k p l l c l o c k g e n e r a t o r c l k p o x t i c l k n o h o s t i n t e r f a c e s c l k s d a t i r q x t o i 2 s / d s p i n t e r f a c e a c l k r a s y n r a d a t r a d a t m a c l k p a s y n p a d a t p 4 h c o m b v i d e o d e c o d e r a d c d e c i m a t i o n f i l t e r a i n 1 4 h c o m b v i d e o d e c o d e r a d c d e c i m a t i o n f i l t e r a i n 2 4 h c o m b v i d e o d e c o d e r a d c d e c i m a t i o n f i l t e r a i n 3 4 h c o m b v i d e o d e c o d e r a d c d e c i m a t i o n f i l t e r a i n 4 4 h c o m b v i d e o d e c o d e r a d c d e c i m a t i o n f i l t e r a i n _ a u x 1 ( a i n 5 1 ) 4 h c o m b v i d e o d e c o d e r a d c d e c i m a t i o n f i l t e r a i n 5 4 h c o m b v i d e o d e c o d e r a d c d e c i m a t i o n f i l t e r a i n 6 4 h c o m b v i d e o d e c o d e r a d c d e c i m a t i o n f i l t e r a i n 7 4 h c o m b v i d e o d e c o d e r a d c d e c i m a t i o n f i l t e r a i n 8 4 h c o m b v i d e o d e c o d e r a d c d e c i m a t i o n f i l t e r a i n _ a u x 2 ( a i n 5 2 ) d a c a o u t i n t e r p o l a t i o n f i l t e r a l i n k o a l i n k i c a s c a d e i n t e r f a c e


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